This invention relates to electronic switches, and, it relates more particularly, to electronic switches having the following characteristics:
(a) the drain-to-source paths of a first metal oxide semiconductor and second MOSFET are series connected;
(b) the junction of both MOSFETs is connected to an output terminal;
(c) a resistor is serially connected to a third MOSFET;
(d) the junction between the resistor and the third MOSFET is connected to the gate terminal of the second MOSFET;
(e) the gate terminal of the first MOSFET is connected to a first of two control input terminals.
An electronic switch of this general type is known and has been described as such. In connection with this type of switch, compare an article by Messrs. M. Pomper, L. Leipold, R. Weidlich entitled "High-Voltage ESFI-SOS Circuits for LCD-Driver Applications"; ESSCIRC '77, ULM, Digest of Technical Papers, pp. 176-178.
Such a conventional circuit is illustrated in FIG. 1. This arrangement includes two n-type channel MOSFETs 1 and 2 whose drain-to-source paths are serially connected together. The source terminal S of MOSFET 1 is grounded, and the drain terminal D of the FET 2 is connected to the supply voltage +U. The junction of both MOSFETs is connected to an output terminal A of the electronic switch. Further, the electronic switch is provided with the series connection of a third n-type channel MOSFET 3 with a depletion FET 4.
The depletion FET 4 is connected to the supply voltage +U, and the source terminal S of MOSFET 3 is at ground potential. The drain terminal D of MOSFET 3 is connected to the gate terminal G of the second MOSFET 2. The gate terminal G of MOSFET 3 is connected to an input terminal E which is also connected to the gate terminal of MOSFET 1. The other input terminal M is at ground potential.
When a signal with a level H, for example, of +5 V is connected to the input terminal E, MOSFET 3 is energized and starts conducting. This signal also turns on MOSFET 1 to assume the conductive state. The gate terminal and the source connection of MOSFET 2 are then effectively connected to a ground potential, so that this MOSFET is thus blocked and remains off. The output A is also connected to a ground potential, and the electronic switch is thus deenergized. However, a current flows through MOSFET 3 and depletion FET 4 acting as a resistor while the switch is in this blocking state.
In the event that a voltage level L, e.g., 0 V is applied to the input terminal E, MOSFETs 3 and 1 will be blocked or turned off. Consequently, the voltage at the gate terminal of MOSFET 2 increases, and this MOSFET commences to conduct. A current will thus flow to the output of the electronic switch. This, however, means that the voltage at the output terminal A and, consequently, at the source terminal of MOSFET 2, will increase. If at the output end, for example, a power MOSFET 5 is located, the voltage at the source terminal of MOSFET 2 is increased in accordance with the charge of the gate capacitances of MOSFET 5.
As the voltage at the gate terminal of MOSFET 2 does not increase beyond +U, the gate source voltage U.sub.GS will decrease steadily. Thus, the current flowing through MOSFET 2 also decreases, so that MOSFET 5 is only able to be energized or activated to conduct slowly. The maximum attainable gate voltage for MOSFET 5 is connected at the voltage +U, minus the starting voltate +U.sub.T of MOSFET 2.